libTriton  version 0.9 build 1502
Register

[python api] All information about the Register Python object.

Description


This object is used to represent a register operand according to the CPU architecture.

Example

>>> ctxt.processing(inst)
True
>>> print(inst)
0x40000: mov ah, byte ptr [rdx + rcx*2 + 0x100]
>>> op0 = inst.getOperands()[0]
>>> print(op0)
ah:8 bv[15..8]
>>> op0.getName()
'ah'
>>> op0.getSize()
1
>>> op0.getBitSize()
8
>>> ctxt.getParentRegister(op0).getName()
'rax'

Constructor

>>> ah = ctxt.getRegister(REG.X86_64.AH)
>>> print(ah)
ah:8 bv[15..8]
>>> print(ah.getBitSize())
8
>>> print(ctxt.registers.rax)
rax:64 bv[63..0]

Python API - Methods of the Register class


  • integer getBitSize(void)
    Returns the size (in bits) of the register.
    e.g: 64
  • BitsVector getBitvector(void)
    Returns the bit vector of the register.
  • EXTEND getExtendSize(void)
    Returns the size (in bits) of the extend. Mainly used for AArch64.
    e.g: 16
  • EXTEND getExtendType(void)
    Returns the extend type of the operand. Mainly used for AArch64.
    e.g: EXTEND.ARM.UXTW
  • REG getId(void)
    Returns the enum of the register.
    e.g: REG.X86_64.RBX
  • string getName(void)
    Returns the name of the register.
    e.g: rbx
  • SHIFT getShiftType(void)
    Returns the shift type of the operand. Mainly used for AArch64.
    e.g: SHIFT.ARM.LSL
  • integer getShiftImmediate(void)
    Returns the shift immediate value of the operand. Mainly used for AArch64 and ARM32.
    e.g: 2
  • REG getShiftRegister(void)
    Returns the shift register of the operand. Mainly used for ARM32.
    e.g: REG.ARM32.R0
  • integer getSize(void)
    Returns the size (in bytes) of the register.
    e.g: 8
  • OPERAND getType(void)
    Returns the type of the register. In this case this function returns OPERAND.REG.
  • bool isMutable(void)
    Returns true if this register is mutable. Mainly used in AArch64 to define that some registers like XZR are immutable.
  • bool isOverlapWith(Register other)
    Returns true if other and self overlap.